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专利名称：Optimization of multiple performance
criteria of integrated circuits by expanding aconstraint graph with subgraphs derivedfrom multiple PWL convex cost functions
发明人：Cyrus Bamji,Enrico Malavasi申请号：US08/627080申请日：19960403公开号：US056631A公开日：19970902
摘要：A system, method, and software product in a computer aided design apparatusfor system design, to simultaneously optimize multiple performance criteria models ofthe system, where the performance criteria models are characterized by convex costfunctions based on linear dimensional characteristics of system being designed. Oneembodiment is provided in a computer aid design environment for integrated circuitdesign, and used to simultaneously optimize fabrication yield along with other
performance criteria. Optimization is provided by converting a structural description of anintegrated circuit into a constraint graph, compacting, and modifying the constraint graphto include convex cost functions for selected performance criteria to optimized, such asyield cost functions. The cost functions are then transformed to piecewise linear costfunctions. The constraint graph is then expanded by replacing edges having piecewiselinear cost function with subgraphs constructed from the piecewise linear cost function.The expanded constraint graph is then minimized using a network flow algorithm. Onceminimized, the constraint graph describes the positions of circuit elements that maximize
yield (and other selected performance criteria) given the cost functions.
申请人：CADENCE DESIGN SYSTEMS, INC.
代理机构：Fenwick & West LLP
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