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专利名称：METHOD AND STRUCTURE FOR COPPER
GAP FILL PLATING OF INTERCONNECTSTRUCTURES FOR SEMICONDUCTORINTEGRATED CIRCUITS
发明人：Yang Hui Xiang,Qing Tang Jiang申请号：US12044254申请日：20080307
公开号：US20090227103A1公开日：20090910
专利附图：
摘要：A method for forming an integrated circuit device including an interconnect
structure, e.g., copper dual damascene. The method includes providing a substrate andforming an interlayer dielectric layer overlying the substrate. The method also includespatterning the interlayer dielectric layer to form a contact structure and forming abarrier metal layer overlying the contact structure. The method includes forming a seedlayer comprising copper bearing species overlying the barrier metal layer and applyingan oxygen bearing species to treat the seed layer to cause an oxide layer of
predetermined thickness to form on the seed layer. The method protects the seed layerfrom contamination using the oxide layer while the substrate is transferred from the stepof applying the seed layer and contacts a copper bearing material in liquid form overlyingthe oxide layer to dissolve the oxide layer while forming a thickness of copper bearingmaterial using a plating process to begin filling the contact structure.
申请人：Yang Hui Xiang,Qing Tang Jiang
地址：Shanghai CN,Shanghai CN
国籍：CN,CN
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