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专利名称：Semiconductor device having a multilevel
interconnection structure
发明人：Nobuyuki Takeyasu,Hiroshi
Yamamoto,Yumiko Kawano,Eiichi
Kondoh,Tomoharu Katagiri,Tomohiro Ohta
申请号：US08/827411申请日：19970327公开号：US05952723A公开日：19990914
摘要：A semiconductor device has a multilevel interconnection structure that includesan insulating interlayer formed on a lower wiring layer, a semiconductor substrate, and atleast one via hole. The via plug partially fills the via hole, and the upper surface of the viaplug may have a convex shape or a surface of the lower wiring layer at a bottom of the viahole may have a concave shape. Where two via holes are present, one via plugsubstantially fills the shallowest via hole, and partially fills the deepest via hole. Theupper wiring layer may be formed over the via plug to fill a remaining portion of the viahole not filled by the via plug.
申请人：KAWASAKI STEEL CORPORATION
代理机构：Oliff & Berridge PLC
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